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| CXA3085AN All Band TV Tuner IC with On-chip PLL For the availability of this product, please contact the sales office. Description The CXA3085AN is a monolithic TV tuner IC which integrates local oscillator and mixer circuits for VHF band, local oscillator and mixer circuits for UHF band, an IF amplifier and a tuning PLL onto a single chip, enabling further miniaturization of the tuner. Features * Low noise figure * Low power consumption (5 V, 54 mA typ.) * On-chip tuning PLL (3-wire bus format) * Selection of frequency steps 31.25 kHz, 50 kHz and 62.5 kHz * On-chip 4-output band switch * SSOP 30-pin package Applications * TV tuners * VCR tuners * CATV tuners Structure Bipolar silicon monolithic IC 30 pin SSOP (Plastic) Absolute Maximum Ratings (Ta = 25 C) * Supply voltage VCC1,VCC2 -0.3 to +5.5 VCC3 -0.3 to +10.0 * Storage temperature Tstg -55 to +150 * Allowable power dissipation PD 880 V V C mW (when mounted on a substrate) Operating Conditions * Supply voltage VCC1, VCC2 VCC3 * Operating temperature Topr 4.75 to 5.3 4.75 to 9.45 -20 to +75 V V C Note) Electrostatic discharge strength is weak, and care should be taken in handling this IC. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. --1-- E97758-TE CXA3085AN Block Diagram and Pin Configuration CL DA CE FMT 1 2 3 4 5 6 Divider 14/15bit Band SW Driver Phase Detector Charge Pump Input Buffer Shift Register Divider 1/512,640,1024 REF OSC 30 29 VCC3 REFOSC 28 27 CPO CPE LOCK BVL BVH LOCK Det 26 BU 7 USW Prescaler 1/8 25 IF OUT VCC1 8 V.REG Bias 24 NC IF AMP 23 GND2 VCC2 MIXout1 9 Buffer 22 MIXout2 10 GND1 11 BYP 12 VHFin 13 Buffer VHF MIX UHF OSC 21 20 19 UOSC2 MS UOSC1 18 Buffer UHFin1 14 UHFin2 15 UHF MIX VHF OSC 17 16 VOSC2 GND VOSC1 --2-- CXA3085AN Pin Description Pin No. Symbol 22 100k 5k Equivalent circuit Pin voltage (V) VCC2 Description 1 CL 1 -- Clock input. 22 100k 5k VCC2 2 DA 2 -- Data input. 22 150k VCC2 3 CE 3 50k 1.25 Enable pin. (when open) 4 FMT 30 VCC3 20k 5 BVL 4 5 6 ON : 4.9 OFF : 0 6 BVH 7 4 : Output for FM TRAP. 5 : Power supply output for VL band. 6 : Power supply pin for VH band. 7 : Power supply output for UHF band. The selected band pin goes High. Analog circuit power supply. 7 8 BU VCC1 9 10 9 MIXout1 Mixer outputs. 10 MIXout2 11 GND1 -- --3-- -- Analog circuit GND. CXA3085AN Pin No. Symbol Equivalent circuit VCC2 Pin voltage (V) Description 12 BYP 20k 80k 2.5 VHF input GND and FMT/BU (when open) data switching. 2.3 (VHF) 0 (UHF) 0 (VHF) 2.3 (UHF) 0 (VHF) 2.3 (UHF) 3 (VHF) 3.1 (UHF) 4.0 (VHF) 5.0 (UHF) -- 3.2 (VHF) 2.9 (UHF) 3.2 (VHF) 2.9 (UHF) 80k 13 VHFin 13 12 VHF input. The input format is unbalanced input. 14 UHFin1 14 15 3k 3k 15 UHFin2 UHF inputs. The input method can be selected from balanced input or unbalanced input. 18 16 VCC1 16 VOSC1 8 8p 3k 50k 50 External resonance circuit connection for VHF oscillator. 18 VOSC2 3k 15p 17 GND 19 21 VCC1 3k GND 19 UOSC1 External resonance circuit connection for UHF oscillator. 3k 21 UOSC2 22 120k VCC2 20 MS 20 50k Frequency step mode selection. 1.5 Five modes can be selected (when open) according to the applied voltage. --4-- CXA3085AN Pin No. 22 23 24 Symbol VCC2 GND2 NC 8 Equivalent circuit -- -- -- VCC1 Pin voltage Description (V) -- PLL circuit power supply. -- PLL circuit GND. -- No connected. 25 IFOUT 25 40 2.3 IF output. VCC2 40k 22 26 LOCK 26 5.0 (Lock) 0.2 (UNLock) LOCK detection. High when locked, Low when unlocked. VCC2 22 27 CPE 200 28 500 0.6 NPN transistor connection for varicap diode drive. 28 CPO 27 20k 2.0 Charge pump output. Connect a loop filter. 60k 30p 30p 29 REFOSC 29 4.3 Crystal connection for reference oscillator. 30 VCC3 -- Power supply for external supply. --5-- CXA3085AN Electrical Characteristics Circuit Current Item Circuit current A Symbol AICCV AICCU Circuit current D DICC See the Electrical Characteristics Measurement Circuit. (VCC=5 V, Ta=25 C) Measurement conditions VCC1 current, Band switch output open during VHF operation VCC1 current, Band switch output open during UHF operation VCC2 current Min. 30 31 7 Typ. 41 42 11 Max. 55 56 15 Unit mA mA mA OSC/MIX/IF Amplifier Block Min. Typ. Max. Unit Measurement conditions 21 24 27 dB VHF operation fRF = 55 MHz 22 25 28 dB VHF operation fRF = 360 MHz 26 29 32 dB UHF operation fRF = 360 MHz 27 30 33 dB UHF operation fRF = 800 MHz 12 15 dB VHF operation fRF = 55 MHz 11 14 dB VHF operation fRF = 360 MHz 8.5 12.5 dB UHF operation fRF = 360 MHz UHF operation fRF = 800 MHz 9.5 13.5 dB VHF operation 97 101 dB fD = 55 MHz, fUD = 12 MHz VHF operation 96 100 dB CM2 fD = 360 MHz, fUD = 12 MHz UHF operation 92 96 dB CM3 fD = 360 MHz, fUD = 12 MHz UHF operation 88 92 dB CM4 fD = 800 MHz, fUD = 12 MHz Maximum output power Pomax 50 load saturation output +7 +10 dBm 4 Switch ON drift VHF operation fOSC = 100 MHz 300 kHz fsw1 f from 3 s to 3 min after switch ON VHF operation fOSC = 405 MHz 400 kHz fsw2 f from 3 s to 3 min after switch ON UHF operation fOSC = 405 MHz 400 kHz fsw3 f from 3 s to 3 min after switch ON UHF operation fOSC = 845 MHz 500 kHz fsw4 f from 3 s to 3 min after switch ON Supply voltage drift VHF operation fOSC = 100 MHz 150 kHz fst1 4 f when VCC 5 V changes 5 % VHF operation fOSC = 405 MHz 250 kHz fst2 f when VCC 5 V changes 5 % UHF operation fOSC = 405 MHz 200 kHz fst3 f when VCC 5 V changes 5 % UHF operation fOSC = 845 MHz 250 kHz fst4 f when VCC 5 V changes 5 % 1 Measured value for untuned inputs. 2 Noise figure is the direct-reading value of NF meter in DSB. 3 Desired signal (fD) input level is -30 dBm. Undesired signal (fUD) is 100 kHz, 30 % AM. The measurement value is undesired signal level, it measured with a spectrum analyzer at S/I=46 dBm. 4 Value when the PLL is not operating. --6-- Item Symbol Conversion gain 1 CG1 CG2 CG3 CG4 Noise figure 1, 2 NF1 NF2 NF3 NF4 1 % cross CM1 modulation 1, 3 CXA3085AN PLL Block Item Symbol CL and DA pins "H" level input voltage VIH "L" level input voltage VIL "H" level input current IIH "L" level input current IIL CE pin "H" level input voltage VIHE "L" level input voltage VILE "H" level input current IIHE "L" level input current IILE CPO (charge pump) Output current ICPO Leak current LeakCP LOCK "H" output voltage VLOCKH VLOCKL "L" output voltage REFOSC Oscillator FXTOSC frequency range CXTOSC Input capacitance VXTOSC Drive level BVL, BVH, BU (Band SW) IBS1 Output current VSAT1 Saturation voltage LeakBS1 Leak current FMT (Band SW) Output current Saturation voltage Leak current Bus timing Data setup time Data hold time Enable waiting time Enable setup time Enable hold time Measurement conditions Min. 3 GND VIH = VCC VIL = GND 3 GND VIHE=VCC VILE=GND 100 -30 50 0 -1 Typ. Max. VCC 1.5 -0.1 -2 VCC 1.5 130 -45 75 30 VCC 0.5 Unit V V A A V V A A A nA V V When locked When unlocked VCC-0.5 0 3 17.5 200 When ON When ON Sink current = 20 mA When OFF 19 400 12 20.5 MHz pF mV mA mV A mA mV A ns ns ns ns ns 100 0.5 -25 200 3 -7 150 0.1 IBS2 When ON VSAT2 When ON Sink current = 5 mA LeakBS2 When OFF tSD tHD tWE tSE tHE See Timing Chart on Page 15 See Timing Chart on Page 15 See Timing Chart on Page 15 See Timing Chart on Page 15 See Timing Chart on Page 15 300 600 300 300 600 75 0.03 --7-- CXA3085AN Electrical Characteristics Measurement Circuit +30V 22k 8200p 1.2k 47k 0.047 33p +5V 47k 2SC2785 3.3 1n 2.6o 2.5t LOCK IF OUT 1T363 0.5p 0.5p 8p 56p 47k 56p 25 24 23 22 21 20 19 18 17 16 VCC1 1T363 330 1p 1n 47k 3.2o 5.5t 1n 47k 51 BVL 3.2o 1.5t 1n 47k 51 BVH 0.5p 82p 47k 1T363 100 XTAL 4MHz 100p 30 29 28 100 47k 1n 1T362 16p 47k 27 26 VOSC2 LOCK VCC3 VCC2 CPO MS NC REFOSC UOSC2 UOSC1 IFOUT GND2 GND CPE CXA3085AN MIX out1 MIX out2 UHFin1 1 2 3 4 5 6 7 8 9 2k 10 11 12 13 14 15 1n 4.5t CLOCK DATA ENABLE 56p FMT BVL BVH BU 100 56p 1n 4.5t 1n 1n UHFin2 1n UHF IN FMT BVH VCC1 GND1 DA BYP BVL CL CE BU VHF IN 3.3 +5V 1n --8-- VHFin VOSC1 CXA3085AN Description of Functions The CXA3085AN is a ground wave broadcast tuner IC which converts frequencies to IF in order to tune and detect only the desired reception frequency of VHF, CATV and UHF band signals. In addition to the mixer, local oscillator and IF amplifier circuits required for frequency conversion to IF, this IC also integrates a PLL circuit for local oscillator frequency control onto a single chip. The functions of the various circuits are described below. 1. Mixer circuit This circuit outputs the frequency difference between the signal input to VHFIN or UHFIN and the local oscillation signal. 2. Local oscillator circuit A VCO is formed by externally connecting an LC resonance circuit composed of a varicap diode and inductance. 3. IF amplifier circuit This circuit amplifies the mixer IF output, and consists of an amplifier stage and low impedance output stage. 4. PLL circuit This PLL circuit fixes the local oscillator frequency to the desired frequency. It consists of a prescaler, main divider, reference divider, phase comparator, charge pump and reference oscillator. The control format supports the 3-wire bus format. The following four modes can be selected according to the combination of the frequency division values of the main and reference dividers. Mode A-0 A-1 A-2 A-3/4 Main divider 15 bit 14 bit 15 bit 15 bit Reference divider 1024 fixed 512 fixed 640 fixed 512 fixed --9-- CXA3085AN Description of Analog Block Operation (See the Electrical Characteristics Measurement Circuit.) VHF oscillator circuit * This circuit is a differential amplifier type oscillator circuit. Pin 18 is the output and Pin 16 is the input. Oscillation is performed by connecting an LC resonance circuit including a varicap to Pin 18 via coupled capacitance, inputting to Pin 16 with feedback capacitance, and applying positive feedback. * Pin 18 is an open collector, so power must be supplied via the resonance circuit inductance or by the resistance or microinductor. The electric potential of Pin 18 at this time must be DC 3.5 V or more. * The amplifier between Pins 16 and 18 has an extremely high gain. Therefore, care should be taken to avoid creating parasitic capacitance, resistance or other feedback loops as this may produce abnormal oscillation. VHF mixer circuit * The mixer circuit employs a double balance mixer with little local oscillation signal leakage. The input format is base input type, with Pin 12 grounded and the RF signal input to Pin 13. * The RF signal is inserted from the oscillator, converted to IF frequency and output from Pins 9 and 10. * Pins 9 and 10 are open collectors, so power must be supplied externally. The electric potential of Pins 9 and 10 at this time must be DC 4.0 V or more. UHF oscillator circuit * This oscillator circuit is designed so that two collector ground type Colpitts oscillators perform differential oscillation operation via an LC resonance circuit including a varicap. An LC resonance circuit including a varicap is connected between Pins 19 and 21. * This circuit contains resonance capacitance comprising Colpitts oscillators, so the LC resonance circuit connected to Pins 19 and 21 oscillates at the frequency indicating the inductance characteristics. UHF mixer circuit * This circuit employs a double balance mixer like the VHF mixer circuit. The input format is base input type, with Pins 14 and 15 as the RF input pins. The input method can be selected from balanced input consisting of differential input to Pins 14 and 15 or unbalanced input consisting of grounding Pin 14 via a capacitor and input to Pin 15. * Pins 9 and 10 are the mixer outputs. * Pins 9 and 10 are open collectors, so power must be supplied externally. The electric potential of Pins 9 and 10 at this time must be DC 4.0 V or more. IF amplifier circuit * The signals frequency converted by the mixer are output from Pins 9 and 10, and at the same time are AC coupled inside the IC and input to the IF amplifier. * Single-tuned filters are connected to Pins 9 and 10 in order to improve the interference characteristics of the IF amplifier. * The signal amplified by the IF amplifier is output from Pin 25. The output impedance is approximately 75 . --10-- CXA3085AN Description of PLL Block The PLL on this IC supports the 3-wire bus control format. The serial data is input to the DA, CL and CE pins. The data is loaded to the shift register at the clock rise, and latched at the enable fall. Symbol CE CL DA LOCK 3-wire bus control Enable input Clock input Data input Lock signal output 1) Mode Setting Method The modes for each frequency step are set according to the MS pin voltage. Mode A-0 A-1 A-2 A-3 A-4 MS pin voltage 0 to 0.15VCC OPEN 0.45VCC to 0.55VCC 0.65VCC to 0.75VCC 0.85VCC to VCC Main divider 15 bit 14 bit 15 bit 15 bit 15 bit Reference divider 1024 512 640 512 512 Reference frequency 3.90625 kHz 7.8125 kHz 6.25 kHz 7.8125 kHz 7.8125 kHz Frequency step 31.25 kHz 62.5 kHz 50 kHz 62.5 kHz 62.5 kHz Control word length Total 19 bits Total 18 bits Total 19 bits Total 19 bits Total 27 bits Frequency step is for when X'tal OSC = 4 MHz. 2) Programming * The VCO lock frequency is obtained according to the following formula. fosc = fref x 8 x (32 M + S) fosc : local oscillator frequency fref : reference frequency 8 : prescaler fixed frequency division ratio M : main divider frequency division ratio S : swallow counter frequency division ratio The variable frequency division ranges of M and S are as follows, and are set as binary. 32 M 1023 (32 M 511 for A-1 mode) 0 S 31 * The PLL control data is comprised of the above frequency data and the band switch control data. --11-- CXA3085AN 2-1) The normal control format is as follows. 2-1-1 : A-0/A-2/A-3 Modes (19-bit data format) Front bit MSB BU FMT BVH BVL M9 M8 M7 M6 M5 2-1-2 : A-1 Mode (18-bit data format) Front bit MSB BU FMT BVH BVL M8 M7 2-1-3 : A-4 Mode (27-bit data format) Front bit MSB BU FMT BVH BVL M9 M8 M7 X CP T1 CD X R1 R0 ) X: Don't care S0 to : M0 to : BVL : BVH : FMT : BU : CP : T1 : CD : R0, R1: swallow counter frequency division ratio setting main divider frequency division ratio setting VL band switch control VH band switch control FM trap switch control UHF band switch control charge pump current switching test mode selection charge pump OFF Reference divider frequency division ratio setting M4 M3 M2 M1 M0 S4 S3 S2 LSB S1 S0 M6 M5 M4 M3 M2 M1 M0 S4 S3 S2 LSB S1 S0 M6 X M5 M4 M3 M2 M1 M0 S4 S3 S2 LSB S1 S0 (output PNP Tr ON when "1") (output PNP Tr ON when "1") (output PNP Tr ON when "1") (output PNP Tr ON when "1") (200 A when "1", 50 A when "0") (when "1") (when "1") (See the table below.) Reference Divider Frequency Division Ratio Table R1 0 1 X ) X: Don't care R0 1 1 0 Reference divider 1024 512 640 --12-- CXA3085AN 2-2) The BU and FMT data order can be switched by DC grounding the BYP pin (VHF input ground side). In this case the control format is as follows. 2-2-1 : A-0/A-2/A-3 Modes (19-bit data format) Front bit MSB FMT BU BVH BVL M9 M8 M7 M6 M5 2-2-2 : A-1 Mode (18-bit data format) Front bit MSB FMT BU BVH BVL M8 M7 2-2-3 : A-4 Mode (27-bit data format) Front bit MSB FMT BU BVH BVL M9 M8 M7 X CP T1 CD X R1 R0 ) X: Don't care M4 M3 M2 M1 M0 S4 S3 S2 LSB S1 S0 M6 M5 M4 M3 M2 M1 M0 S4 S3 S2 LSB S1 S0 M6 X M5 M4 M3 M2 M1 M0 S4 S3 S2 LSB S1 S0 S0 to : M0 to : BVL : BVH : FMT : BU : CP : T1 : CD : R0, R1: swallow counter frequency division ratio setting main divider frequency division ratio setting VL band switch control VH band switch control FM trap switch control UHF band switch control charge pump current switching test mode selection charge pump OFF Reference divider frequency division ratio setting (output PNP Tr ON when "1") (output PNP Tr ON when "1") (output PNP Tr ON when "1") (output PNP Tr ON when "1") (200 A when "1", 50 A when "0") (when "1") (when "1") (See the table below.) Reference Divider Frequency Division Ratio Table R1 R0 Reference divider 0 1 1024 1 1 512 X 0 640 ) X: Don't care --13-- CXA3085AN 3) 3-wire Bus Data Format A-1 Mode (18-bit data format) Band switch data BU /FMT FMT /BU Frequency data M7 M6 M5 M4 M3 M2 M1 M0 S4 S3 S2 S1 S0 BVH BVL M8 DATA 1 CLOCK 4 5 18 ENABLE A-0/A-2/A-3 Modes (19-bit data format) Band switch data BU /FMT FMT /BU Frequency data M8 M7 M6 M5 M4 M3 M2 M1 M0 S4 S3 S2 S1 S0 BVH BVL M9 DATA 1 CLOCK 4 5 19 ENABLE A-4 Mode (27-bit data format) Band switch data BU /FMT FMT /BU Frequency data M8 S3 S2 S1 S0 X CP T1 Test data CD X R1 R0 X BVH BVL M9 DATA 1 CLOCK 4 5 19 20 27 ENABLE --14-- CXA3085AN Bus Timing Chart tSD tHD DATA 3V 1.5V CLOCK 3V 1.5V ENABLE 3V 1.5V tWE tSE tHE tSD = Data setup time tHD = Data hold time tSE = Enable setup time tHE = Enable hold time tWE = Enable waiting time --15-- CXA3085AN Circuit current vs. Supply voltage 1 45 UHF 15 Circuit current vs. Supply voltage 2 AICC - Circuit current [mA] VHF DICC - Circuit current [mA] 40 10 35 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 VCC1 - Supply voltage [V] Band SW output voltage vs. Output current (BU, BVH, BVL) 9.2 VCC2 - Supply voltage [V] Band SW output voltage vs. Output current (FMT) 9.2 9.0 VCC3=9V 9.0 VCC3=9V 8.8 8.8 Output voltage [V] Output voltage [V] VCC3=5V 8.6 8.6 5.0 5.0 VCC3=5V 4.8 4.8 4.6 4.6 4.4 0 5 10 15 20 25 4.4 0 1 2 3 4 5 6 Output current [mA] I/O characteristics (Untuned input) 20 Output current [mA] 0 IF output level [dBm] -20 fRF=100MHz (VHF) fRF=450MHz (UHF) fIF is both f=45MHz -40 -60 -60 -50 -40 -30 -20 -10 0 10 RF input level [dBm] --16-- CXA3085AN Conversion gain vs. Reception frequency (Untuned input) 40 fIF=45MHz 35 Noise figure vs. Reception frequency (Untuned input, in DSB) 20 fIF=45MHz CG - Conversion gain [dB] 30 25 20 15 10 5 0 0 100 200 300 400 500 600 700 800 900 Reception frequency [MHz] Next adjacent cross modulation vs. Reception frequency (Untuned input) 120 VHF (Low) VHF (High) UHF NF - Noise figure [dB] 15 VHF (Low) VHF (High) 10 UHF 5 0 0 100 200 300 400 500 600 700 800 900 Reception frequency [MHz] Oscillation frequency power supply fluctuation (PLL off) 400 300 200 VHF (High) VHF (Low) UHF VCC+5% VCC-5% (VCC=5V) CM - Cross modulation [dB] 100 +B drift [kHz] 80 60 40 20 0 fIF=45MHz fUD=fD+12MHz fUD=fD-12MHz (100kHz, 30% AM) 100 0 -100 -200 -300 0 100 200 300 400 500 600 700 800 900 Reception frequency [MHz] -400 0 100 200 300 400 500 600 700 800 900 Oscillation frequency [MHz] PCS beat characteristics +20 +10 0 -10 fIF IF output level [dBm] -20 -30 -40 -50 fBeat -60 -70 -80 fLocal=129MHz fP=83.25MHz fC=86.83MHz, (fP-12dB) fS=87.75MHz, (fP-1.7dB) fIF=45.75MHz fBeat=fIF920kHz -30 -20 -10 0 +10 +20 SG output level [dBm] (fP level) --17-- CXA3085AN Tuning Response Time VHF (Low) 95MHz VHF (High) 395MHz T=70ms 5.0V/div offset 10.0V -90,0000ms 10,0000ms 20.0ms/div 110,000ms UHF 413MHz UHF 847MHz T=70ms 5.0V/div offset 10.0V -90,0000ms 10,0000ms 20.0ms/div 110,000ms --18-- CXA3085AN IF output spectrum RL=0dBm 10dB/div VHF (Low) fRF=55MHz fLO=100MHz RF input level : -40dBm CENTER 45.0MHz RES BW 1.0kHz VBW 10Hz SPAN 100.0kHz SWP 30.0s IF output spectrum RL=0dBm 10dB/div VHF (High) fRF=350MHz fLO=395MHz RF input level : -40dBm CENTER 45.0MHz RES BW 1.0kHz VBW 10Hz SPAN 100.0kHz SWP 30.0s --19-- CXA3085AN IF output spectrum RL=0dBm 10dB/div UHF (Low) fRF=800MHz fLO=845MHz RF input level : -40dBm CENTER 45.0MHz RES BW 1.0kHz VBW 10Hz SPAN 100.0kHz SWP 30.0s --20-- CXA3085AN VHF Input Impedance j50 j25 j100 0 50 50MHz 1000p 12 13 VHFin S11 15 350MHz -j25 -j100 -j50 UHF Input Impedance j50 j25 j100 UHFin1 BYP 0 14 50 1000p UHFin2 S11 350MHz -j25 800MHz -j100 -j50 --21-- CXA3085AN IF Output Impedance j50 j25 j100 0 50 45MHz -j25 -j100 -j50 --22-- CXA3085AN Package Outline Unit : mm 30PIN SSOP (PLASTIC) + 0.2 1.25 - 0.1 9.7 0.1 0.10 30 16 5.6 0.1 A 1 + 0.1 0.22 - 0.05 0.13 M 15 0.65 + 0.05 0.15 - 0.02 0.1 0.1 0 to 10 NOTE: Dimension "" does not include mold protrusion. DETAIL A PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE SSOP-30P-L01 SSOP030-P-0056 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER/PALLADIUM PLATING 42/COPPER ALLOY 0.1g --23-- 0.5 0.2 7.6 0.2 |
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